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BufferMemoryCards BufferMemoryCards

The buffer memory image cards

The sample card shown below (front and back) illustrates the complexity of building large memory cards back in the early 1970s (Figures 8 through 10). Increases in chip memory capacity enabled enough memory to be put on a few cards to represent images with detail sufficient for meaningful biological image analysis. Before these new memory chips (the Texas Instruments TMS 4030 chip was a 4Kx1 bit dynamic RAM) were available, we had planned to construct the buffer memories using static shift-register memory chips (as George had done in the grain counter system). Total memory pixel size was 1 megabyte for the 64 boards - today 1 gigabyte of memory the size of a thumbnail sells for under $25 (on sale). Not only would the static shift-register memory chips have been more expensive, but also they also would not have had the random access performance we required in image processing, creating an inadequate design. The shift registers would have led to a slower, much smaller memory using more power for the same cost. The image pixels size and number of images in the buffer memories would have been less and many of the powerful software applications we used the RTPP for would not have worked as well or even been developed.

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